Power dissipation in CMOS March 10, 2018 dynamic fall time leakage power power dissipation in cmos rise time short circuit current slew static transition time +
Physical Design Flow - Stage 1 - Sanity Checks February 28, 2018 check_design check_timing initial checks sanity checks +
VLSI Physical Design Interview Questions January 29, 2018 physical design interview vlsi pd interview questions +
Major Domains in VLSI January 20, 2018 analog layout design verification dft physical design physical verification post silicon validation rtl design vlsi designation vlsi domains vlsi fields +